IIT Hyderabad Recruitment 2026 – Apply for Analog IC Designer Vacancy
IIT Hyderabad Recruitment 2026: Apply for 1 Analog IC Designer vacancy at the IC Design Lab. Salary ₹50,000 plus HRA. Ph.D. and 3+ years of relevant experience required. Email your CV by 10 November 2026.
Date Posted: 24 October 2026
Organization: Indian Institute of Technology Hyderabad (IIT Hyderabad)
About Organization:
The Indian Institute of Technology Hyderabad (IITH) is a premier institute of science and technology established in 2008. The institute offers undergraduate and postgraduate programmes across engineering, applied sciences, design and interdisciplinary fields. Research, innovation and entrepreneurship are central to its academic environment.
IIT Hyderabad has invited applications for one Analog IC Designer position on a full-time contractual basis for an R&D project at its IC Design Lab. Candidates with strong expertise in analog and mixed-signal integrated circuit design are encouraged to apply.
Vacancy Details
| Particulars | Details |
|---|---|
| Position | Analog IC Designer |
| Number of vacancies | 1 |
| Work domain | Analog and Mixed-Signal Integrated Circuit Design |
| Employment type | Full-time contractual |
| Monthly salary | ₹50,000 plus HRA |
| Contract period | 1 year |
| Extension | Based on performance and project requirements |
| Application mode | |
| Last date | 10 November 2026 |
Educational Qualifications
The notification specifies the following preferred qualification:
- A Ph.D., along with a B.Tech. and/or M.Tech. in a relevant discipline.
- Relevant disciplines include Electrical Engineering, Electronics and Communication Engineering, or VLSI Design.
- Candidates should have at least 3 years of relevant experience in analog or mixed-signal IC design.
The supplied recruitment details describe the Ph.D. as mandatory. Candidates should confirm the precise degree requirements with the IC Design Lab if their academic pathway differs.
Required Experience and Technical Skills
Candidates should have a strong background in CMOS analog circuit design, transistor-level simulations and analog performance analysis.
Relevant experience should include:
- Analog and mixed-signal integrated circuit design.
- Transistor-level circuit design and simulation.
- Schematic design, testbench development and pre-layout simulations.
- Industry-standard EDA tools, particularly Cadence Virtuoso, Spectre and ADE.
- PVT corner analysis and Monte Carlo simulations.
- Analog circuit performance optimisation and verification.
Key Responsibilities
The selected Analog IC Designer will be expected to undertake the following responsibilities:
- Design and develop analog and mixed-signal integrated circuits at the transistor level.
- Perform schematic design, testbench development and pre-layout simulations using Cadence Virtuoso, Spectre and ADE.
- Design analog circuit blocks, including operational amplifiers (Op-Amps), comparators, current mirrors, bias circuits, bandgap references and low-dropout regulators (LDOs).
- Conduct DC, AC, transient, noise, stability, PVT corner and Monte Carlo simulations.
- Optimise circuits for power, performance and area (PPA), gain, bandwidth, noise and stability.
- Collaborate with layout engineers on floorplanning, matching techniques and layout reviews.
- Perform post-layout simulations with parasitic extraction and investigate performance deviations.
- Work with foundry process design kits (PDKs), device models and process design rules.
- Support design reviews, technical documentation, silicon characterisation and validation in collaboration with cross-functional teams.
Salary and Remuneration
The selected candidate will receive:
₹50,000 per month plus House Rent Allowance (HRA).
The position is full-time and contractual for an initial period of one year. The contract may be extended depending on performance and project requirements.
The supplied notification does not specify the HRA amount or percentage.
Age Limit
No specific age limit is mentioned in the supplied recruitment details.
Application Fee
No application fee has been prescribed for this recruitment.
Selection Process
The supplied recruitment information describes the following process:
- Candidates must email their latest CV or resume to the designated contact.
- Applications will undergo initial screening.
- Shortlisted candidates will be contacted directly by the IC Design Lab for further evaluation.
- The expected joining date for the selected candidate is 20 November 2026.
The notification does not detail a formal multi-stage selection process or specify an interview date.
Important Dates
| Event | Date |
|---|---|
| Advertisement posted | 24 October 2026 |
| Last date to submit CV | 10 November 2026 |
| Expected joining date | 20 November 2026 |
| Initial contract period | 1 year |
| Contract extension | Subject to performance and project requirements |
Candidates should submit their CV before the deadline to allow time for application screening.
How to Apply
Eligible candidates can apply by email by following these steps:
- Prepare an updated and detailed resume or CV.
- Highlight your Ph.D. and relevant B.Tech./M.Tech. qualifications.
- Include details of at least three years of relevant analog or mixed-signal IC design experience.
- Describe your practical experience with Cadence Virtuoso, Spectre, ADE and other relevant design tools.
- Include details of relevant IC design projects, research publications or technical achievements, if available.
- Email your CV to prahaseeth.manne@ee.iith.ac.in.
- Ensure that your application reaches the designated email address by 10 November 2026.
Application email: prahaseeth.manne@ee.iith.ac.in
Suggested email subject: Application for Analog IC Designer – IIT Hyderabad R&D Project
This subject line is suggested for convenience; the supplied recruitment details do not prescribe a specific subject line.
Documents Required
Candidates should keep the following documents ready:
- Updated detailed CV or resume.
- Ph.D. degree certificate and relevant academic records.
- B.Tech./M.Tech. educational certificates and marksheets.
- Evidence of at least three years of relevant experience, such as experience certificates or employment records.
- Details of previous analog or mixed-signal IC design projects.
- Research publications or technical portfolio, if available.
- Other supporting documents requested during the selection process.
The supplied recruitment information does not provide an exhaustive mandatory document checklist.
Important Links and Contact Details
| Particulars | Details |
|---|---|
| Institute website | https://www.iith.ac.in |
| Application email | prahaseeth.manne@ee.iith.ac.in |
| Recruiting unit | IC Design Lab, IIT Hyderabad |
| Official notification | Analog IC Designer notification; a direct URL was not supplied |
| Last date | 10 November 2026 |
Address:
IC Design Lab
Indian Institute of Technology Hyderabad
Telangana, India.