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IIITDM Kurnool
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IIITDM Kurnool Junior Research Fellow Recruitment 2026 – MeitY C2S Project

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IIITDM Kurnool JRF Recruitment 2026: Apply for 2 Junior Research Fellow posts under a MeitY C2S project in VLSI, hardware accelerators and digital design. Salary ₹37,000 with GATE and ₹30,000 without GATE. Apply by 28 August.

Date Posted: 8th August 2026

Organization: Indian Institute of Information Technology, Design and Manufacturing, Kurnool (IIITDM Kurnool)

About the Recruitment

Indian Institute of Information Technology, Design and Manufacturing, Kurnool has invited applications for Junior Research Fellow (JRF) positions under a MeitY-sponsored C2S Project (Category III) in the Department of Electronics and Communication Engineering.

The selected candidates will work on the research project:

“Instruction-Data level Parallelism based Hardware Accelerator Design in HPC and CPS Applications”

Recruitment Details

Advertisement No.: IIITDMKL/ECE/JRF/2026/02
Advertisement Date: 27th July 2026
Post: Junior Research Fellow (JRF)
Number of Posts: 02
Project: C2S Project – Category III
Funding Agency: Ministry of Electronics & Information Technology (MeitY)
Department: Electronics and Communication Engineering
Employment Type: Temporary
Initial Duration: 1 Year
Job Location: Kurnool, Andhra Pradesh
Application Mode: Post / Email
Last Date: 28th August 2026

Project Title

“Instruction-Data level Parallelism based Hardware Accelerator Design in HPC and CPS Applications”

Essential Qualification

Candidates must possess either:

Option 1:

  • B.E./B.Tech in Electrical Engineering or Electronics Engineering
  • Minimum 6.5 CGPA

OR

Option 2:

  • B.E./B.Tech in Electrical/Electronics Engineering with minimum 6.5 CGPA
  • M.E./M.Tech in Microelectronics / VLSI Design with minimum 6.5 CGPA

Desirable Qualification & Experience

Preference may be given to candidates with experience or knowledge in:

  • Digital System Design
  • RTL Design
  • Verilog
  • VHDL
  • IP Integration using Xilinx Vivado
  • Custom IP Development using Xilinx Vivado
  • Semi-Custom ASIC Design
  • EDA Tools
  • Hardware Accelerator Design
  • VLSI Design

Candidates with relevant research or project experience in hardware design and digital systems may have an advantage.

Salary

QualificationMonthly Fellowship
With GATE Score₹37,000/-
Without GATE Score₹30,000/-

The remuneration is consolidated.

Nature of Appointment

The position is purely temporary for one year.

The engagement may be extended for another one or two years, or until completion of the project, depending on:

  • Project requirements
  • Candidate performance
  • Availability of project funds

Extension is not automatic and will be subject to the applicable project conditions.

Selection Process

The selection will be through:

  1. Written Test
  2. Interview

Only shortlisted candidates will be called for the written test followed by an interview.

The date and time of the written test/interview will be communicated to shortlisted candidates through email.

How to Apply

Candidates must fill and sign the prescribed application form and submit it along with copies of the required testimonials/documents.

Applications can be submitted by either:

Post: Send the completed and signed application along with supporting documents to the Chief Investigator.

Email: Send a scanned copy of the completed and signed application along with the required testimonials to the Chief Investigator.

Chief Investigator

Dr. Mohamed AsanBasiri M
Department of Electronics and Communication Engineering
IIITDM Kurnool
Jagannathagattu, Dinnedevarapadu
Kurnool, Andhra Pradesh – 518008

Email:

Important Date

Last Date for Receipt of Completed Application:
28th August 2026

Documents to Submit

Candidates should attach the necessary supporting documents, including:

  • Academic certificates and mark sheets
  • GATE scorecard, if applicable
  • Experience certificates, if applicable
  • Category certificate, where applicable
  • PwD certificate, where applicable
  • Other relevant testimonials

Original testimonials will be verified at the time of the written test/interview.

Important Instructions

  • Incomplete or partially filled applications will not be considered.
  • Applications not submitted in the prescribed format will be summarily rejected.
  • Candidates must ensure that all information provided is correct.
  • Only eligible and shortlisted candidates will be contacted.
  • No interim correspondence regarding shortlisting will be entertained.
  • Canvassing in any form will lead to disqualification.
  • No TA/DA will be provided for attending the written test/interview.
  • Shortlisted candidates will be informed through email.
  • Candidates should regularly check the institute website for updates.

Official Website

IIITDM Kurnool Official Website

Organization Address

Indian Institute of Information Technology, Design and Manufacturing, Kurnool
Jagannathagattu, Dinnedevarapadu
Kurnool, Andhra Pradesh – 518008
An Institute with National Importance under MoE, Government of India